1. Field of the Invention
The invention relates generally to a method of manufacturing a thin film transistor in a semiconductor device, and more particularly to, a method of manufacturing a thin film transistor in a semiconductor device using a three-dimensional stack process by which a silicon thin film is deposited on a single crystal driver transistor to form a load transistor in a SRAM manufacture process.
2. Description of the Prior Art
Recently, as notebook computers and PDA (personal digital assistant) gain popularity, there is a great demand for random access memory (RAM) having a low power, a high speed and a high integration. DRAM can be highly integrated but has a low speed. SRAM is difficult to be higher integrated since it requires a large cell area. In order to reduce the cell area, SRAM is made using a three-dimensional stack process by which a silicon thin film is deposited on a single crystal driver transistor to form a load transistor. From 16 Kb SRAM, a polysilicon load resistor cell has been used as a standard memory cell of a versatile SRAM. A TFT type cell using a PMOS polysilicon thin film transistor has been adopted from 4 Mb. If the TFT type cell is used, there are advantages that the consumption current can be kept below 1 xcexcA upon data hold and it is strong to a soft error that is frequently generated at a high operation. Specially, there is an advantage that the size of the cell can be smaller than using a conventional polysilicon load resistor by means of a stacking technology. The polysilicon thin film transistor currently used, however, has problems that the device characteristic is irregular and reliability is low due to a crystal boundary irregularly existing in the polysilicon thin film
This is because that the crystal boundary is irregularly formed in an active region of a transistor. As the device is scaled down, an effect by random crystal boundary is severe and the throughout is thus degraded, which is further fatal as the integration level of the memory becomes high. It is most preferable that the single crystal silicon device is used as the load transistor. Though it is difficult to manufacture the single crystal silicon stack load transistor using a current technology, a structure in which 6 transistors are manufactured on one plane has been adopted.
Another problem in the polysilicon silicon transistor is that the substrate is floated. In this case, holes formed by the junction leakage current are accumulated on the substrate to raise the potential of the body, which increases the sub-threshold leakage current. Due to this, there is a problem that the stand-by power is increased.
The present invention is contrived to solve the problems and an object of the present invention is to provide a method of manufacturing a thin film transistor in a semiconductor device capable of increasing the uniformity and reliability of a load transistor, in a way that a single crystal silicon thin film is formed on an interlayer insulating film over a single crystal driver transistor using solid phase crystallization of amorphous silicon, a single crystal silicon thin film transistor (Cxe2x80x94Si TFT) as a load transistor is formed in the single crystal silicon thin film, and a contact plug connecting a drain of the driver transistor and a drain of the load transistor is used as a solid phase crystallization (SPC) plug.
In order to accomplish the above object, a method of manufacturing a thin film transistor in a semiconductor device according to the present invention, is characterized in that it comprises the steps of forming a plurality of access transistors and driver transistors in a semiconductor substrate and then an interlayer insulating film on the entire structure; forming a gate of a give pattern on the interlayer insulating film and then forming a gate oxide film on the entire structure; etching given regions of the gate oxide film and the interlayer insulating film to expose drains in the driver transistors; forming an amorphous silicon thin film on the entire structure; solid-phase crystallizing the amorphous silicon thin film by means of annealing process to form a single crystal silicon thin film; and implanting an impurity into a given region except for the single crystal silicon thin film on the gate to form source/drain.
Also, a method of manufacturing a thin film transistor in a semiconductor device according to the present invention, is characterized in that it comprises the steps of forming a plurality of junction regions, access transistors and driver transistors in a semiconductor substrate and then an interlayer insulating film on the entire structure; etching given regions of the gate oxide film and the interlayer insulating film to expose the junction regions and a drain in the driver transistor; forming an amorphous silicon thin film on the entire structure; solid-phase crystallizing the amorphous silicon thin film by means of annealing process to form a single crystal silicon thin film; forming a gate oxide film and a gate of a given pattern on the single crystal silicon thin film on the junction regions; and forming source/drain in the single crystal silicon thin film through impurity ion implantation process using the gate as an ion implantation mask.